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Error-Control Coding in Computers
July 1990 (vol. 23 no. 7) pp. 63-72
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Eiji Fujiwara, Dhiraj K. Pradhan, "Error-Control Coding in Computers," Computer, vol. 23, no. 7, pp. 63-72, July, 1990.
 
 
BibTex
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@article{ 10.1109/2.56853,
author = {Eiji Fujiwara and Dhiraj K. Pradhan},
title = {Error-Control Coding in Computers},
journal ={Computer},
volume = {23},
number = {7},
issn = {0018-9162},
year = {1990},
pages = {63-72},
doi = {http://doi.ieeecomputersociety.org/10.1109/2.56853},
publisher = {IEEE Computer Society},
address = {Los Alamitos, CA, USA},
}
 
 
RefWorks Procite/RefMan/Endnote
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TY - MGZN
JO - Computer
TI - Error-Control Coding in Computers
IS - 7
SN - 0018-9162
SP63
EP72
EPD - 63-72
A1 - Eiji Fujiwara,
A1 - Dhiraj K. Pradhan,
PY - 1990
VL - 23
JA - Computer
ER -
 

In this article, intended for readers with basic knowledge in coding, the codes used in actual systems are surveyed. Error control in high-speed memories is examined, including bit-error-correcting/detecting codes, byte-error-correcting/detecting codes, and codes to detect single-byte errors as well as correct single-bit errors and detect double-bit errors. Tape and disk memory codes for error control in mass memories are discussed. Processor error control and unidirectional error-control codes are covered, including the application of the latter to masking asymmetric line faults.

Citation:
Eiji Fujiwara, Dhiraj K. Pradhan, "Error-Control Coding in Computers," Computer, vol. 23, no. 7, pp. 63-72, Jul., 1990
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