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Published Articles >> Table of Contents >> Abstract
May/June 2001 (Vol. 18, No. 3)
pp. 56-68
Data Memory Organization and Optimizations in Application-Specific Systems
Preeti Ranjan Panda
Nikil D. Dutt
Alexandru Nicolau
Francky Catthoor
Arnout Vandecappelle
Erik Brockmeyer
Chidamber Kulkarni
Eddy De Greef
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DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/54.922803
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| Abstract |
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In application-specific designs, customized memory organization expands the search space for cost-optimized solutions. Several optimization strategies can be applied to embedded systems with several different memory architectures: data cache, scratch-pad memory, custom memory architectures, and dynamic random-access memory (DRAM).
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References
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[1] J. Hennessy and D. Patterson, Computer Architecture: A Quantitative Approach. Morgan Kaufmann, 1995.
[2] P.R. Panda, N.D. Dutt, and A. Nicolau, Memory Issues in Embedded Systems-on-Chip: Optimizations and Exploration, Kluwer Academic Publishers, Norwell, Mass., 1999.
[3] C. Kulkarni, F. Catthoor, and H. De Man, "Cache Transformations for Low Power Caching in Embedded Multimedia Processors," Proc. Int'l Parallel Processing Symp.(IPPS 98), IEEE Press, Piscataway, N.J., 1998, pp. 292-297.
[4] C. Kulkarni et al., "Cache-Conscious Data Layout Organization for Embedded Multimedia Applications," Proc. 4th ACM/IEEE Design and Test in Europe Conf., ACM Press, New York, Mar. 2001.
[5] P.R. Panda, N.D. Dutt, and A. Nicolau, "On-Chip vs. Off-Chip Memory: The Data Partitioning Problem in Embedded Processor-Based Systems," ACM Trans. Design Automation of Electronic Systems, vol. 5, no. 3, July 2000, pp. 682-704.
[6] P.R. Panda, N.D. Dutt, and A. Nicolau, "Local Memory Exploration and Optimization in Embedded Systems," IEEE Trans. Computer-Aided Design, vol. 18, no. 1, Jan. 1999, pp. 3-13.
[7] W.-T. Shiue and C. Chakrabarti, “Memory Exploration for Low Power, Embedded Systems,” Proc. Design Automation Conf. (DAC '99), 1999.
[8] F. Catthoor et al., Custom Memory Management Methodology—Exploration of Memory Organization for Embedded Multimedia System Design, Kluwer Academic Publishers, Norwell, Mass., 1998.
[9] S. Wuytack et al., "Minimizing the Required Memory Bandwidth in VLSI System Realizations," IEEE Trans. VLSI Systems, vol. 7, no. 4, Dec. 1999, pp. 433-441.
[10] WF.J. Verhaegh, P.E.R. Lippens, E.H.L. Aarts, J.H.M. Korst, J.L. van Meerbergen, and A. van der Werf, “Improved Force-Directed Scheduling in High-Throughput Digital Signal Processing” IEEE Trans. Computer-Aided Design, vol. 14, no. 8, Aug. 1995
[11] P.E.R. Lippens et al., "Allocation of Multiport Memories for Hierarchical Data Streams," Proc. IEEE Int'l Conf. Computer-Aided Design, IEEE CS Press, Los Alamitos, Calif., 1993, pp. 728-735.
[12] V. Lefebvre and P. Feautrier, "Optimizing Storage Size for Static Control Programs in Automatic Parallelizers," Proc. Euro-Par 97 Conf., Lecture notes in Computer Science, vol. 1300, Springer-Verlag, Heidelberg, Germany, 1997.
[13] P-G. Kjeldsberg, F. Catthoor, and E.J. Aas, "Automated Data Dependency Size Estimation with a Partially Fixed Execution Ordering," Proc. IEEE/ACM Int'l Conf. Computer-Aided Design, IEEE CS Press, Los Alamitos, Calif, 2000, pp. 44-50.
[14] P.R. Panda, "Memory Bank Customization and Assignment in Behavioral Synthesis," Proc. IEEE/ACM Int'l Conf. Computer-Aided Design, IEEE CS Press, Los Alamitos, Calif, 1999.
[15] A. Khare et al., "High-Level Synthesis with SDRAMs and Rambus DRAMs," IEICE Trans. Fundamentals of Electronics, Comm., and Computer Sciences, vol. E82-A, no. 11, Nov. 1999, pp. 2347-2355.
Additional References
[1] P.R. Panda, N.D. Dutt, and A. Nicolau, "On-Chip vs. Off-Chip Memory: The Data Partitioning Problem in Embedded Processor-Based Systems," ACM Trans. Design Automation of Electronic Systems, vol. 5, no. 3, July 2000, pp. 682-704.
Additional References
[1] P.R. Panda, N.D. Dutt, and A. Nicolau, Memory Issues in Embedded Systems-on-Chip: Optimizations and Exploration, Kluwer Academic Publishers, Norwell, Mass., 1999.
[2] P. Grun, N.D. Dutt, and A. Nicolau, "Memory-Aware Compilation through Accurate Timing Extraction," Proc. Design Automation Conf., ACM Press, New York, 2000, pp. 316-321.
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Additional Information
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Citation:
Preeti Ranjan Panda, Nikil D. Dutt, Alexandru Nicolau, Francky Catthoor, Arnout Vandecappelle, Erik Brockmeyer, Chidamber Kulkarni, Eddy De Greef,
"Data Memory Organization and Optimizations in Application-Specific Systems,"
IEEE Design and Test of Computers,
vol. 18,
no. 3,
pp. 56-68,
May/Jun,
2001
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