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Published Articles >> Table of Contents >> Abstract
First NASA/ESA Conference on Adaptive Hardware and Systems (AHS'06)
pp. 179-185
Generalized Disjunction Decomposition for the Evolution of Programmable Logic Array Structures
Emanuele Stomeo, Brunel University, UK
Tatiana Kalganova, Brunel University, UK
Cyrille Lambert, Brunel Univerity, UK
Full Article Text:
 
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/AHS.2006.47
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| Abstract |
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Evolvable hardware refers to a self reconfigurable
electronic circuit, where the circuit configuration is
under the control of an evolutionary algorithm.
Evolvable hardware has shown one of its main
deficiencies, when applied to solving real world
applications, to be scalability. In the past few years
several techniques have been proposed to avoid and/or
solve this problem. Generalized disjunction
decomposition (GDD) is one of these proposed
methods. GDD was successful for the evolution of
large combinational logic circuits based on a FPGA
structure when used together with bi-directional
incremental evolution and with (1+ë) evolution
strategy. In this paper a modified generalized
disjunction decomposition, together with a recently
introduced multi-population genetic algorithm, are
implemented and tested for its scalability for solving
large combinational logic circuits based on
Programmable Logic Array (PLA) structures.
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 Additional Information
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Citation:
Emanuele Stomeo, Tatiana Kalganova, Cyrille Lambert,
"Generalized Disjunction Decomposition for the Evolution of Programmable Logic Array Structures,"
ahs,
pp. 179-185,
First NASA/ESA Conference on Adaptive Hardware and Systems (AHS'06),
2006
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