| Abstract |
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Integrated systems represent the most common solution for storage and transmission of confidential data. However, cryptographic devices can be subject to passive attacks that consist in retrieving secret data by observing physical properties of the device (e.g. execution time, power consumption, electromagnetic field). An attack based on power analysis for instance is very efficient and relatively easy to perform. Designers implement this attack in order to see if their design meets the requirements in terms of resistance. In this paper we describe a complete and flexible environment for validation of a digital device when attacked by means of Differential Power Analysis.
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 Additional Information
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Index Terms- Secure chips, DPA, Validation
Citation:
Giorgio Di Natale, Marie-Lise Flottes, Bruno Rouzeyre,
"An Integrated Validation Environment for Differential Power Analysis,"
delta,
pp. 527-532,
4th IEEE International Symposium on Electronic Design, Test and Applications (delta 2008),
2008
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