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An Advanced Minimization Technique for Multiple Valued Multiple Output Logic Expressions Using LUT and Realization Using Current Mode CMOS

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DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/DSD.2005.13

8th Euromicro Conference on Digital S ...

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	Similar Articles Articles by Md. Sumon Shahriar Articles by A.R. Mustafa Articles by Chowdhury Farhan Ahmed Articles by Abu Ahmed Ferdaus Articles by A.N.M. Zaheduzzaman Articles by Shahed Anwar Articles by Hafiz MD Hasan Babu

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	Md. Sumon Shahriar, A.R. Mustafa, Chowdhury Farhan Ahmed, Abu Ahmed Ferdaus, A.N.M. Zaheduzzaman, Shahed Anwar, Hafiz MD Hasan Babu, "An Advanced Minimization Technique for Multiple Valued Multiple Output Logic Expressions Using LUT and Realization Using Current Mode CMOS," Digital Systems Design, Euromicro Symposium on, vol. 0, no. 0, pp. 122-126, 8th Euromicro Conference on Digital System Design (DSD'05), 2005.

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	@article{ 10.1109/DSD.2005.13, author = {Md. Sumon Shahriar and A.R. Mustafa and Chowdhury Farhan Ahmed and Abu Ahmed Ferdaus and A.N.M. Zaheduzzaman and Shahed Anwar and Hafiz MD Hasan Babu}, title = {An Advanced Minimization Technique for Multiple Valued Multiple Output Logic Expressions Using LUT and Realization Using Current Mode CMOS}, journal ={Digital Systems Design, Euromicro Symposium on}, volume = {0}, year = {2005}, isbn = {}, pages = {122-126}, doi = {http://doi.ieeecomputersociety.org/10.1109/DSD.2005.13}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Digital Systems Design, Euromicro Symposium on TI - An Advanced Minimization Technique for Multiple Valued Multiple Output Logic Expressions Using LUT and Realization Using Current Mode CMOS SN - SP122 EP126 A1 - Md. Sumon Shahriar, A1 - A.R. Mustafa, A1 - Chowdhury Farhan Ahmed, A1 - Abu Ahmed Ferdaus, A1 - A.N.M. Zaheduzzaman, A1 - Shahed Anwar, A1 - Hafiz MD Hasan Babu, PY - 2005 KW - null VL - 0 JA - Digital Systems Design, Euromicro Symposium on ER -

Md. Sumon Shahriar, University of Dhaka

A.R. Mustafa, Uni. Asia Pac., Bangladesh

Chowdhury Farhan Ahmed, University of Dhaka

Abu Ahmed Ferdaus, University of Dhaka

A.N.M. Zaheduzzaman, Stamford University

Shahed Anwar, University of Dhaka

Hafiz MD Hasan Babu, University of Dhaka

We proposed an advanced minimization method for multiple valued multiple output functions in this paper. We extracted the shared sub functions with a proposed heuristic method to pair the functions. New minimization approach for multiple valued functions has also been proposed where we used Kleenean Coefficients and we used LUT to reduce the complexity as well. Our minimization method reduces the number of implicants significantly. The realization of the minimized circuits has also been shown using current mode CMOS.

Citation:

Md. Sumon Shahriar, A.R. Mustafa, Chowdhury Farhan Ahmed, Abu Ahmed Ferdaus, A.N.M. Zaheduzzaman, Shahed Anwar, Hafiz MD Hasan Babu, "An Advanced Minimization Technique for Multiple Valued Multiple Output Logic Expressions Using LUT and Realization Using Current Mode CMOS," dsd,pp.122-126, 8th Euromicro Conference on Digital System Design (DSD'05), 2005

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