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Published Articles >> Table of Contents >> Abstract
2005 NASA/DoD Conference on Evolvable Hardware (EH'05)
pp. 301-306
FemtoComputing: New Architectural Ideas for Procedural and Evolutionary Computers Whose Components Switch in Femto-Seconds
Hugo de Garis, Utah State University
Thayne Batty, Utah State University
Wang Ce, Utah State University
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DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/EH.2005.29
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This paper presents some tentative ideas on how future procedural and evolutionary computers might compute, when nanotechnology gives us the possibility to store a bit of information on a single atom. At such tiny scales, switching times are likely to be in femto-seconds, i.e. quadrillionths of a second [14]. Since electrical signals travel about 30 cms (a foot) in a nano-second, a femto-second will correspond to a millionth of this distance, i.e. a length of about 300 molecules. Traditional computing methodologies, using a centralized memory to store program instructions, and a centralized ALU to perform calculations, will no longer be appropriate, due to the time delays involved in fetching instructions from the program memory to the ALU. In the time this would take, the ALU would have changed its state (switching in femto-seconds). Hence both the program instructions, and the means used to execute them, need to be distributed throughout the 3D space of the computational medium, whatever form it takes. This paper discusses new and preliminary architectural ideas on how "femto-computers" can compute in both a procedural and in an evolutionary style.
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Citation:
Hugo de Garis, Thayne Batty, Wang Ce,
"FemtoComputing: New Architectural Ideas for Procedural and Evolutionary Computers Whose Components Switch in Femto-Seconds,"
eh,
pp. 301-306,
2005 NASA/DoD Conference on Evolvable Hardware (EH'05),
2005
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