Published Articles >> Table of Contents >> Abstract

3rd Euromicro Workshop on Parallel and Distributed Processing   p. 236
Word parallelism vs spatial parallelism: a performance optimization technique on the PAPRICA system
A. Broggi, Dipartimento di Ingegneria dell'Inf., Parma Univ., Italy

Full Article Text:

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/EMPDP.1995.389137
Send link to a friend

Abstract
Starting from the analysis of the hardware efficiency of SIMD systems which use an external memory for data storage, this paper discusses a critical point in hardware design. In particular it presents a technique aimed to the maximization of the data bus efficiency. This technique is based on the transformation of the initial data set into a packed one, and can be successfully implemented on systems which allow a dynamic mapping between the processing array and the external memory. As an example, the PAPRICA system is considered. An optimizing assembly-to-assembly translator has been developed for the automatic conversion of a generic PAPRICA assembly program working on binary data sets into its equivalent version working on packed data sets. An, example of a thinning filter shows how this technique can improve the performances.
Back to Top Additional Information
Index Terms- performance evaluation; parallel machines; optimisation; program interpreters; assembly language; parallel architectures; word parallelism; spatial parallelism; performance optimization technique; PAPRICA system; hardware efficiency; SIMD systems; external memory; data storage; hardware design; data bus efficiency; packed data sets; dynamic mapping; processing array; optimizing assembly-to-assembly translator; automatic conversion; binary data sets; thinning filter Citation:  A. Broggi, "Word parallelism vs spatial parallelism: a performance optimization technique on the PAPRICA system," pdp, p. 236,  3rd Euromicro Workshop on Parallel and Distributed Processing,  1995