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DSynth: A Pipeline Synthesis Environment for FPGAs

DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/FCCM.2006.37

14th Annual IEEE Symposium on Field-P ...

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	Michael Wirthlin, Welson Sun, "DSynth: A Pipeline Synthesis Environment for FPGAs," Field-Programmable Custom Computing Machines, Annual IEEE Symposium on, vol. 0, no. 0, pp. 343-344, 14th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM'06), 2006.

	BibTex	x
	@article{ 10.1109/FCCM.2006.37, author = {Michael Wirthlin and Welson Sun}, title = {DSynth: A Pipeline Synthesis Environment for FPGAs}, journal ={Field-Programmable Custom Computing Machines, Annual IEEE Symposium on}, volume = {0}, year = {2006}, isbn = {}, pages = {343-344}, doi = {http://doi.ieeecomputersociety.org/10.1109/FCCM.2006.37}, publisher = {IEEE Computer Society}, address = {Los Alamitos, CA, USA}, }

	RefWorks Procite/RefMan/Endnote	x
	TY - CONF JO - Field-Programmable Custom Computing Machines, Annual IEEE Symposium on TI - DSynth: A Pipeline Synthesis Environment for FPGAs SN - SP343 EP344 A1 - Michael Wirthlin, A1 - Welson Sun, PY - 2006 KW - null VL - 0 JA - Field-Programmable Custom Computing Machines, Annual IEEE Symposium on ER -

Michael Wirthlin, Brigham Young University, Provo, UT

Welson Sun, Brigham Young University, Provo, UT

A synthesis environment called DSynth has been created for synthesizing high-performance pipelined circuits for FPGAs from synchronous data flow specifications. The goal of this work is to generate the minimum size circuit that meets the throughput constraint of the data flow model. To achieve this constraint efficiently, this approach relies heavily upon a library of pre-characterized pipelined circuit modules. In addition, resource sharing is used extensively to reduce the overall hardware cost.

Citation:

Michael Wirthlin, Welson Sun, "DSynth: A Pipeline Synthesis Environment for FPGAs," fccm,pp.343-344, 14th Annual IEEE Symposium on Field-Programmable Custom Computing Machines (FCCM'06), 2006

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