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Predicate Elimination Technique in Binary Translation for IA-64 Architecture
16th International Conference on Arti ...
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Zong-Yu Song, National Digital Switching System Engineering & Technological R&D Center, China
Ming Su, National Digital Switching System Engineering & Technological R&D Center, China
EPIC (Explicitly Parallel Instruction Computing) architectures, such as the Intel IA-64 (Itanium), support novel features such as explicit instruction-level parallelism and predicated instructions. While these features promise to make code more efficient, the fact that these new architectural features means that EPIC code is more difficult to analyze than code for more traditional architectures. This paper describes a technique for removing predication instructions from optimized binary programs in a way that is guaranteed to preserve program semantics, and thereby improve the quality of binary translation for IA-64.
Citation:
Zong-Yu Song, Ming Su, "Predicate Elimination Technique in Binary Translation for IA-64 Architecture," icat,pp.209-212, 16th International Conference on Artificial Reality and Telexistence--Workshops (ICAT'06), 2006
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