| Abstract |
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Radiation-induced soft errors are getting worse in digital systems manufactured in advanced technologies. Stringent data integrity and availability requirements of enterprise computing and networking applications demand special attention to soft errors in sequential elements and combinational logic. This tutorial will discuss the impact of technology scaling on soft error rates, circuit-level modeling of soft errors, architectural impact of soft errors, challenges associated with evaluation of run-time behaviors of systems in the presence of soft errors, actual data on system behaviors in the presence of soft errors, metrics for quantifying soft error vulnerabilities, design of architectures with Built-in-Soft-Error-Resilience techniques, and actual case studies.
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 Additional Information
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Index Terms- Soft errors, Memory soft errors, Logic soft errors, Error Correcting Codes, FITs, timing derating, logic derating, architectural derating, radiation hardening, Built-In Soft Error Resilience, error detection, recovery, data integrity, reliability, availability
Citation:
1 Mitra, 1 Sanda, 1 Seifert,
"Soft Errors: Technology Trends, System Effects, and Protection Techniques,"
iolts,
p. 4,
13th IEEE International On-Line Testing Symposium (IOLTS 2007),
2007
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