|
Published Articles >> Table of Contents >> Abstract
March/April 2006 (Vol. 26, No. 2)
pp. 38-47
Digitally Assisted Analog Circuits
Boris Murmann, Stanford University
Full Article Text:
  
DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/MM.2006.33
Send link to a friend
| Abstract |
|
Today's interfaces between digital and "real world" analog signals rely mainly on complex analog circuit components that strictly limit achievable power efficiency and throughput. Digitally assisted analog circuits can exploit digital circuits' high density and low energy per computation to enable a new generation of interface electronics based on minimal-precision, low-complexity analog building blocks.
|
References
|
[1] S.-T. Ryu et al., "A 10b 50MS/s Pipelined ADC with Opamp Current Reuse," in Digest Tech. Papers IEEE Int'l Solid-State Circuits Conf. (ISSCC 06), IEEE Press, 2006 pp. 216–217.
[2] B. Murmann and B.E. Boser, "A 12-bit 75-MS/s Pipelined ADC Using Open-Loop Residue Amplification," IEEE J. Solid-State Circuits, vol. 41, no. 12, Dec. 2003, pp. 2040–2050.
[3] C.R. Grace et al., "A 12-bit 80MSample/s Pipelined ADC with Bootstrapped Digital Calibration," IEEE J. Solid-State Circuits, vol. 42, no. 12, Dec. 2004, pp. 1038–1046.
[4] S. Borkar, "Design Challenges of Technology Scaling," IEEE Micro, vol. 19, no. 4, Jul.–Aug. 1999, pp. 23–29.
[5] J. Li and U.-K. Moon, "Background Calibration Techniques for Multistage Pipelined ADCs with Digital Redundancy," IEEE Trans. Circuits and Systems II, vol. 50, no. 9, Sept. 2003, pp. 531–538.
[6] M. Copeland and J. Rabaey, "A Dynamic Amplifier for MOS-Technology," Electronics Letters, vol. 15, May 1979, pp. 301–302.
[7] T. Sepke et al., "Comparator-Based Switched-Capacitor Circuits for Scaled CMOS Technologies," in Digest Tech. Papers IEEE Int'l Solid-State Circuits Conf. (ISSCC 06), IEEE Press, 2006, pp. 220–221.
[8] A. Zanikopoulos et al., "A Flexible ADC Approach for Mixed-Signal SoC Platforms," Proc. Int'l Symp. Circuits and Systems (ISCAS 05), vol. 5, IEEE Press, 2005, pp. 4839–4842.
[9] W. Namgoong, "A Channelized Digital Ultrawideband Receiver," IEEE Trans. Wireless Comm., vol. 2, no. 2, Mar. 2003, pp. 502–510.
[10] Y. Oh and B. Murmann, "System Embedded ADC Calibration for OFDM Receivers," to be published in IEEE Trans. Circuits Syst.
[11] A. Aggarwal and T.H. Meng, "Minimizing the 47 Peak-to-Average Power Ratio of OFDM Signals via Convex Optimization," Proc. IEEE Global Telecommunications Conf., IEEE Press, 2003, pp. 2385–2389.
[12] A.C. Dent and C.F.N. Cowan, "Improving DAC Linearity by Threshold Tracking," Proc. IEE Colloquium Advanced A/D and D/A Conversion Techniques and Applications, 1989, Inst. of Electrical Engineers, pp. 1–4.
[13] S. Pamarti et al., "A Wideband 2.4-GHz Delta-Sigma Fractional-NPLL with 1-Mb/s Inloop Modulation," IEEE J. Solid-State Circuits, vol. 42, no. 1, Jan. 2004, pp. 49–62.
|
Additional Information
|
Index Terms- analog circuits, analog signals, digital computing, analog-to-digital converter
Citation:
Boris Murmann,
"Digitally Assisted Analog Circuits,"
IEEE Micro,
vol. 26,
no. 2,
pp. 38-47,
Mar/Apr,
2006
|
|