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21st International Conference on VLSI Design (VLSI Design 2008)   pp. 415-420
High-Level Modeling Approach for Analyzing the Effects of Traffic Models on Power and Throughput in Mesh-Based NoCs

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DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/VLSI.2008.40
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Abstract
Traffic models exert different message flows in a network and have a considerable effect on power consumption through different applications. So a good power analysis should consider traffic models. In this paper we present power and throughput models in terms of traffic rate parameters for the most popular traffic models, i.e. Uniform, Local, HotSpot and First Matrix Transpose (FMT) as a permutational traffic model. We also select Mesh topology as the most prominent NoC topology and validate the presented models by comparing our results against simulation results from Synopsys Power Compiler and Modelsim. From the comparison, we show that our modeling approach leads to average error of 2% for power and 2.8% for throughput modeling.
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Citation:  Somayyeh Koohi, Mohammad Mirza-Aghatabar, Shaahin Hessabi, Masoud Pedram, "High-Level Modeling Approach for Analyzing the Effects of Traffic Models on Power and Throughput in Mesh-Based NoCs," vlsi-design, pp. 415-420,  21st International Conference on VLSI Design (VLSI Design 2008),  2008

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