Improving the Performance of CAD Optimization Algorithms Using On-Line Meta-Level Control

19th International Conference on VLSI Design held jointly with 5th International Conference on Embedded Systems Design (VLSID'06) pp. 683-688
Improving the Performance of CAD Optimization Algorithms Using On-Line Meta-Level Control
Sandip Aine, Indian Institute of Technology - Kharagpur
P. P. Chakrabarti, Indian Institute of Technology - Kharagpur
Rajeev Kumar, Indian Institute of Technology - Kharagpur

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DOI Bookmark: http://doi.ieeecomputersociety.org/10.1109/VLSID.2006.105
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Abstract
We present a profile based meta-reasoning model for parameter control of CAD algorithms working under constrained run-time. We also propose a unified framework, that can take informed decision about the time allocation and parameter adaptation of the algorithm, where there is no hard run-time constraints, instead the quality-time trade-off is expressed by a utility function. We use the proposed strategy to get an adaptive cooling schedule for the simulated annealing algorithm. Application on two classical NP-hard problems in the VLSI domain, namely, the standard cell placement problem and the circuit partitioning problem shows that significant improvement of quality can be achieved using a profile based control.
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Citation: Sandip Aine, P. P. Chakrabarti, Rajeev Kumar, "Improving the Performance of CAD Optimization Algorithms Using On-Line Meta-Level Control," vlsid, pp. 683-688, 19th International Conference on VLSI Design held jointly with 5th International Conference on Embedded Systems Design (VLSID'06), 2006

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