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Networks-on-Chip, International Symposium on

Analysis of photonic networks for a chip multiprocessor using scientific applications

Year: 2009, Pages: 104-113

Authors

Gilbert Hendry, Lightwave Research Laboratory, Columbia University, New York, 10027, USA  
Shoaib Kamil, Computer Science Department, University of California, Berkeley, 94720, USA  
Aleksandr Biberman, Lightwave Research Laboratory, Columbia University, New York, 10027, USA  
Johnnie Chan, Lightwave Research Laboratory, Columbia University, New York, 10027, USA  
Benjamin G. Lee, Lightwave Research Laboratory, Columbia University, New York, 10027, USA  
Marghoob Mohiyuddin, Computer Science Department, University of California, Berkeley, 94720, USA  
Ankit Jain, Computer Science Department, University of California, Berkeley, 94720, USA  
Keren Bergman, Lightwave Research Laboratory, Columbia University, New York, 10027, USA  
Luca P. Carloni, Computer Science Department, Columbia University, New York, 10027, USA  
John Kubiatowicz, Computer Science Department, University of California, Berkeley, 94720, USA  
Leonid Oliker, CRD/NERSC, Lawrence Berkeley National Laboratory, Berkeley, CA 94720, USA  
John Shalf, CRD/NERSC, Lawrence Berkeley National Laboratory, Berkeley, CA 94720, USA
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Abstract

As multiprocessors scale to unprecedented numbers of cores in order to sustain performance growth, it is vital that these gains are not nullified by high energy consumption from inter-core communication. With recent advances in 3D Integration CMOS technology, the possibility for realizing hybrid photonic-electronic networks-on-chip warrants investigating real application traces on functionally comparable photonic and electronic network designs. We present a comparative analysis using both synthetic benchmarks as well as real applications, run through detailed cycle accurate models implemented under the OMNeT++ discrete event simulation environment. Results show that when utilizing standard process-to-processor mapping methods, this hybrid network can achieve 75× improvement in energy efficiency for synthetic benchmarks and up to 37× improvement for real scientific applications, defined as network performance per energy spent, over an electronic mesh for large messages across a variety of communication patterns.
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