2009 IEEE/ACM International Symposium on Nanoscale Architectures
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Abstract

Crossbar nano-architectures based on self-assembled strucrures are promising alternatives for current CMOS technology, which is facing serious challenges for further down-scaling. However, high permanent and transient failure rates lead to multiple faults during lifetime operation of crossbar nano architectures. In this paper, we propose a concurrent multiple error detection scheme for multistage nano-crossbars based on dual-rail implementations of logic functions. We provide the proofs of detectability of all single faults as well as most classes of multiple faults. As shown by simulation results, unlike traditional methods such as TMR, the proposed scheme is capable of detecting more than 99.85% of multiple (transient and permanent) faults.
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