Abstract
Application specific integrated circuits (ASICs), which represent a target platform for safety-related applications, were already covered in the first edition of the standard IEC 61508 in terms of functional safety. Corresponding requirements are introduced in part 2 of the standard. However, using ASICs with on-chip redundancy for safety applications has been introduced only in subsequent drafts of the standard. Corresponding core requirements for on-chip redundancy for ASICs are explained in the second edition of the standard. The theoretical conclusions and analyses have been implemented in several research projects based on a redundant system architecture consisting of two RISC cores with a hardware comparator as a diagnosis unit. In this paper, the implementation of safety-related on-chip systems will be discussed on the basis of the theoretical requirements of the standard as well as on the basis of practice-related experiences.