2016 IEEE East-West Design & Test Symposium (EWDTS)
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Abstract

A new solution for building memory BIST infrastructure, based on rules of fault periodicity and regularity in test algorithms was introduced recently. These rules are represented in a form of a Fault Periodicity Table (FPT) considering both known and unknown memory faults in one table. In this paper, application of the proposed methodology for description of external memory faults is shown. Investigation showed that the FPT needs to be extended in order to include the external memory faults. Both interconnect and array faults of external memories are considered in this paper.
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