11th IEEE International On-Line Testing Symposium
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Abstract

A comprehensive online test strategy requires both concurrent and non-concurrent fault detection capabilities to guarantee SoCs?s successful normal operation in-field at any level of its life cycle. While concurrent fault detection is mainly achieved by hardware or software redundancy, like duplication, non-concurrent fault detection, particularly useful for periodic testing, is usually achieved through hardware BIST. Software-based self-test has been recently proposed as an effective alternative to hardware-based self-test allowing at-speed testing while eliminating area, performance and power consumption overheads. In this paper we focus on the applicability of software-based self-test to non-concurrent on-line testing of embedded processor cores. Low-cost in-field testing requirements, particularly small test execution time and low power consumption guide the development of self-test routines. We show how self-test programs with a limited number of memory references and based on compact test routines provide an efficient low-cost on-line test strategy.
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