2010 IEEE 16th International On-Line Testing Symposium (IOLTS 2010)
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Abstract

This paper presents a new method of fault-tolerant design for combinational circuits. For an arbitrary chosen subset X1 of inputs the designed system is fault-tolerant, but not necessarily for the other inputs. For all the inputs from X1 the same level of fault tolerance as for Triple Modular Redundancy (TMR) is achieved. Compared to TMR the necessary area can be significantly reduced. Since the subset X1 of inputs, for which the system is fault-tolerant, can be chosen by the designer, the proposed fault-tolerant design method is optimally adapted to the real requirements of fault tolerance.
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