Proceedings 21st International Conference on Computer Design
Download PDF

Abstract

Demands for the low power VLSI have been pushing the development of aggressive design methodologies to reduce the power consumption drastically. To meet the growing demand, we propose a low power adder, which adaptively selects supply voltages based on the input vector patterns. We prototyped a 32-bit Ripple Carry Adder and analyzed the power consumption and performance in details. Results show 29% improvement in power consumption over a conventional ripple carry adder with comparable performance.
Like what you’re reading?
Already a member?Sign In
Member Price
$11
Non-Member Price
$21
Add to CartSign In
Get this article FREE with a new membership!

Related Articles