Abstract
This paper proposed a method to integrate the AES encrypter and the AES decrypter into a full functional AES crypto-engine. This method can make it a very low-complexity architecture, especially in saving the hardware resource in implementing the AES (Inv)SubBytes module and (Inv)Mixcolumns module, etc. Most designed modules can be used for both AES encryption and decryption. Besides, the architecture can still deliver a high data rate in both en/decryption operations. The proposed architecture is suited for hardware-critical applications, such as smart card, PDA, and mobile phone, etc.