Hardware Implementation of an Elliptic Curve Processor over GF(p)

S?dd?ka Berna Ors; Lejla Batina; Bart Preneel; Joos Vandewalle

doi:10.1109/ASAP.2003.1212866

Proceedings IEEE International Conference on Application-Specific Systems, Architectures, and Processors. ASAP 2003

Hardware Implementation of an Elliptic Curve Processor over GF(p)

Year: 2003, Pages: 433

DOI Bookmark: 10.1109/ASAP.2003.1212866

Authors

S?dd?ka Berna Ors, Katholieke Universiteit Leuven, ESAT/SCD-COSIC
Lejla Batina, SafeNet BV/Katholieke Universiteit Leuven, ESAT/SCD-COSIC
Bart Preneel, Katholieke Universiteit Leuven, ESAT/SCD-COSIC
Joos Vandewalle, Katholieke Universiteit Leuven, ESAT/SCD-COSIC

Abstract

This paper describes a hardware implementation of an arithmetic processor which is efficient for bit-lengths suitable for both commonly used types of Public Key Cryptography (PKC), i.e., Elliptic Curve (EC) and RSA Cryptosystems. Montgomery modular multiplication in a systolic array architecture is used for modular multiplication. The processor consists of special operational blocks for Montgomery Modular Multiplication, modular addition/subtraction, EC Point doubling/addition, modular multiplicative inversion, EC point multiplier, projective to affine coordinates conversion and Montgomery to normal representation conversion.

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Hardware Implementation of an Elliptic Curve Processor over GF(p)

Authors

Abstract

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