Current sensing methodology for completion detection in self-timed systems

Lukáš Nagy; Viera Stopjaková

doi:10.1109/DDECS.2011.5783123

14th IEEE International Symposium on Design and Diagnostics of Electronic Circuits and Systems

Current sensing methodology for completion detection in self-timed systems

Year: 2011, Pages: 405-406

DOI Bookmark: 10.1109/DDECS.2011.5783123

Authors

Lukáš Nagy, Department of Microelectronics, Slovak University of Technology, Bratislava, Slovakia
Viera Stopjaková, Department of Microelectronics, Slovak University of Technology, Bratislava, Slovakia

Abstract

This paper addresses an alternative approach in detecting completion of computation in asynchronous circuits. The proposed method is based on sensing the amount of consumed power supply current. It represents a simple but reliable and effective way of detecting the computation completion in this type of digital systems. The paper presents a novel topology of current sensing circuitry, explanation of the operation as well as simulation results and finally the conclusion.

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Current sensing methodology for completion detection in self-timed systems

Authors

Abstract

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