A programmable BIST with macro and micro codes for embedded SRAMs

P. Manikandan; Bjorn B Larsen; Einar J Aas; Mohammad Areef

doi:10.1109/EWDTS.2011.6116584

2011 9th East-West Design & Test Symposium (EWDTS)

A programmable BIST with macro and micro codes for embedded SRAMs

Year: 2011, Pages: 144-150

DOI Bookmark: 10.1109/EWDTS.2011.6116584

Authors

P. Manikandan, The Norwegian University of Science and Technology, Norway
Bjorn B Larsen, The Norwegian University of Science and Technology, Norway
Einar J Aas, The Norwegian University of Science and Technology, Norway
Mohammad Areef, Juniper Networks, India

Abstract

This paper presents a programmable built-in self-test (PBIST) methodology for embedded SRAMs. The BIST logic adapts the test controller with micro code encoding technique in order to control test operation sequences. The macro codes are used to select any of seven MARCH algorithms, and detect different faults of the memory under test (MUT). This BIST supports both the test and normal operation modes. The experimental results show that this work gives 17 -- 47% improved area overhead and 16 -- 41% enhanced speed compared to three published results.

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A programmable BIST with macro and micro codes for embedded SRAMs

Authors

Abstract

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