Abstract
Circuit-level simulation of /spl Delta//spl Sigma/ modulators is a time-consuming task (taking one or more days for meaningful results). While there are a great variety of techniques and tools that speed up the simulations for discrete-time (DT) /spl Delta//spl Sigma/ modulators, there is no rigorous methodology implemented in a tool to efficiently simulate and design the continuous-time (CT) counterpart. Yet, in todays low-power, high-accuracy and/or very high-speed demands for A-to-D converters, designers are often forced to resort to the use of CT /spl Delta//spl Sigma/ topologies. In this paper, we present a method for the high-level simulation of continuous-time /spl Delta//spl Sigma/ modulators that is based on behavioral models and which exhibits the best trade-off between accuracy, speed and extensibility compared to other possible techniques that are reviewed briefly in this work. A user-friendly tool, implementing this methodology, is then presented. Nonidealities such as finite gain, finite GBW, output impedance and also nonlinearities such as clipping, harmonic distortion and the important effect of jitter are modeled. Finally, experiments were carried out using the tool, exploring important design trade-offs.