Implementation of a floating-point matrix-vector multiplication on a reconfigurable architecture

Fabio Garzia; Claudio Brunelli; Davide Rossi; Jari Nurmi

doi:10.1109/IPDPS.2008.4536538

2008 IEEE International Parallel & Distributed Processing Symposium

Implementation of a floating-point matrix-vector multiplication on a reconfigurable architecture

Year: 2008, Pages: 1-6

DOI Bookmark: 10.1109/IPDPS.2008.4536538

Authors

Fabio Garzia, Department of Computer Systems, Tampere University of Technology, Finland
Claudio Brunelli, Department of Computer Systems, Tampere University of Technology, Finland
Davide Rossi, DEIS, Università degli studi di Bologna, Italy
Jari Nurmi, Department of Computer Systems, Tampere University of Technology, Finland

Abstract

This paper describes the implementation of a floating-point 4×4 matrix-vector multiplication on a reconfigurable system. The 4×4 matrix-vector multiplication is meant to be used to perform two steps (transformation and perspective projection) of a 3D graphics application.

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Implementation of a floating-point matrix-vector multiplication on a reconfigurable architecture

Authors

Abstract

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