2015 19th International Symposium on VLSI Design and Test (VDAT)
Download PDF

Abstract

These days, in emergency, multiple assay operations are required to be performed at parallel. Area of a given chip as a constraint, how efficiently we can use the chip and how much parallelism can be built-in are the objectives of this paper. A typical application of an assay may characterize a sample where, say only one type of reagent and multiple samples have been considered, or vice versa, and identify some factor(s) of the sample(s) under requirement in parallel. A generalized application may also consider more samples and more reagents for respective findings at parallel. In our experimentation, we effectively do this task in parallel for five such sets of sub regions of a given restricted sized chip in Digital microfluidics using an array based partitioning pin assignment technique, where cross contamination problem has also been considered, and efficiency of proper taxonomy of a given sample has also been improved.
Like what you’re reading?
Already a member?
Get this article FREE with a new membership!

Related Articles