Proceedings. 4th International Workshop on Microprocessor Test and Verification - Common Challenges and Solutions
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Abstract

Verification of individual components of a system on a chip (SOC) has become ever more complex, with the added requirement that individual verification environments need to work well with system level environments to reduce verification time. Two of the often used approaches towards unit verification are memory image based data checking and port-to-port data checking. We compare and evaluate these approaches with respect to the rest of the environment, the logic under test and other relevant issues.
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