Survivable Discrete Circuits Design

A. Matrosova; V. Andreeva; Yu. Sedov

doi:10.1109/OLT.2002.1030177

On-Line Testing Workshop, IEEE International

Survivable Discrete Circuits Design

Year: 2002, Pages: 13

DOI Bookmark: 10.1109/OLT.2002.1030177

Authors

A. Matrosova, Tomsk State University
V. Andreeva, Tomsk State University
Yu. Sedov, Tomsk State University

Abstract

Schemes providing a synchronous sequential circuit (SSC) or combinational circuit (CC) survivability for unidirectional transient and intermittent faults are suggested. They are based on doubling self-checking circuits with using a self-testing checker for one of them and masking a fault manifestation with OR, AND and MX circuits. The schemes ensure a correct behavior when any scheme permissible fault occurs. We mean single stuck-at faults at gates poles and d flip-flops poles of the scheme. A method of cutting overhead during survivable self-checking SSC design is proposed. It is oriented to only transient faults.

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Survivable Discrete Circuits Design

Authors

Abstract

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